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ISLA224P
CLOCK
GENERATION
INP
INN
SHA
2.5-BIT
FLASH
2.5-BIT
FLASH
6- STAGE
1.5-BIT/ STAGE
3- STAGE
1- BIT/ STAGE
3-BIT
FLASH
1.25V
+
–
DIGITAL
ERROR
CORRECTION
LVDS/ LVCMOS
OUTPUTS
FIGURE 21. A/D CORE BLOCK DIAGRAM
The performance of the ISLA224P25 changes with variations in
CLKN
CLKP
RESETN
CAL_STATUS
BIT
CLKOUTP
CALIBRATION
BEGINS
CALIBRATION
TIME
CALIBRATION
COMPLETE
temperature, supply voltage or sample rate. The extent of these
changes may necessitate recalibration, depending on system
performance requirements. Best performance will be achieved
by recalibrating the A/D under the environmental conditions at
which it will operate.
A supply voltage variation of <100mV will generally result in an
SNR change of <0.5dBFS and SFDR change of <3dBc.
In situations where the sample rate is not constant, best results
will be obtained if the device is calibrated at the highest sample
rate. Reducing the sample rate by less than 80MSPS will typically
result in an SNR change of <0.5dBFS and an SFDR change of
FIGURE 22. CALIBRATION TIMING
User Initiated Reset
Recalibration of the A/D can be initiated at any time by driving
the RESETN pin low for a minimum of one clock cycle. An
open-drain driver with a drive strength in its high impedance
state of less than 0.5mA is recommended, as RESETN has an
internal high impedance pull-up to OVDD. As is the case during
power-on reset, RESETN and DNC pins must be in the proper
state for the calibration to successfully execute.
17
<3dBc.
Figures 23 through 28 show the effect of temperature on SNR
and SFDR performance with power on calibration performed at
-40°C, +25°C, and +85°C. Each plot shows the variation of
SNR/SFDR across temperature after a single power on
calibration at -40°C, +25°C and +85°C. Best performance is
typically achieved by a user-initiated power on calibration at the
operating conditions, as stated earlier. However, it can be seen
that performance drift with temperature is not a very strong
function of the temperature at which the power on calibration is
performed.
FN7570.1
November 30, 2012
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相关代理商/技术参数
ISLA224P 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Dual 14-Bit, 250MSPS/200MSPS/130MSPS ADC
ISLA224P12 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:High Performance Dual 14-Bit, 125MSPS ADC
ISLA224P12IRZ 制造商:Intersil Corporation 功能描述:DUAL 14-BIT 125MSPS UNBUFFERED INPUT, 72-PIN - Trays 制造商:Intersil Corporation 功能描述:IC ADC 14BIT SPI/SRL 125M 48QFN 制造商:Intersil 功能描述:Dual 14-Bit 125MSPS Unbuffered Input, 72
ISLA224P13 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Dual 14-Bit, 250MSPS/200MSPS/130MSPS ADC
ISLA224P13IRZ 制造商:Intersil Corporation 功能描述:DUAL 14-BIT 130MSPS UNBUFFERED INPUT, 72-PIN - Trays 制造商:Intersil Corporation 功能描述:IC ADC 14BIT SRL/SPI 72QFN 制造商:Intersil 功能描述:DL 14-BIT 130MSPS UNBUFRED INPUT 72PIN
ISLA224P20 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Dual 14-Bit, 250MSPS/200MSPS/130MSPS ADC
ISLA224P20IRZ 制造商:Intersil Corporation 功能描述:DUAL 14-BIT 200MSPS UNBUFFERED INPUT, 72-PIN - Trays 制造商:Intersil Corporation 功能描述:IC ADC 14BIT SRL/SPI 72QFN 制造商:Intersil 功能描述:DL 14-BIT 200MSPS UNBUFRED INPUT 72PIN 制造商:Intersil Corporation 功能描述:IC, ADC, 14BIT; Resolution (Bits):14bit; Sampling Rate:200MSPS; Supply Voltage Type:Single; Supply Voltage Min:1.7V; Supply Voltage Max:1.9V; Supply Current:375mA; Digital IC Case Style:QFN; No. of Pins:72; Data Interface:SPI ;RoHS Compliant: Yes
ISLA224P25 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Dual 14-Bit, 250MSPS/200MSPS/130MSPS ADC